1

Modeling charge injection in MOS analog switches

Year:
1987
Language:
english
File:
PDF, 358 KB
english, 1987
11

A compact IGFET charge model

Year:
1984
Language:
english
File:
PDF, 402 KB
english, 1984
20

An analytical model of two-tier handoff mechanisms for a hierarchical NEMO system

Year:
2008
Language:
english
File:
PDF, 546 KB
english, 2008
22

System-on-a-chip design for modern communications

Year:
2001
Language:
english
File:
PDF, 275 KB
english, 2001
30

Modeling ferroelectric capacitors for memory applications

Year:
2002
Language:
english
File:
PDF, 1.24 MB
english, 2002
31

Modeling the switched-induced error voltage on a switched-capacitor

Year:
1983
Language:
english
File:
PDF, 281 KB
english, 1983
32

Scanning the issue - Special issue on nanoelectronics and nanoscale processing

Year:
2003
Language:
english
File:
PDF, 220 KB
english, 2003
46

Image compression on a VLSI neural-based vector quantizer

Year:
1992
Language:
english
File:
PDF, 4.46 MB
english, 1992
50

Testing of programmable analog neural network chips

Year:
1994
Language:
english
File:
PDF, 1.17 MB
english, 1994